AMD Drives Quantum Computing Breakthroughs Through High Performance Classical System Codesign

Oak Ridge National Laboratory, IBM, and AMD are collaborating on a codesign platform to implement real-time quantum error correction by coupling quantum processing units with leadership-class classical computing infrastructure. This technical integration targets scalable scientific research and high-performance computing workloads.

Operational Challenge and Partner Roles
Practical quantum computation requires continuous quantum error correction to mitigate physical qubit decoherence before operations fail. Decoding these errors involves massive, low-latency classical computational throughput operating adjacent to the quantum control plane.

To resolve these integration bottlenecks, the partners distribute responsibilities across complementary engineering layers. IBM supplies the physical quantum hardware. Oak Ridge National Laboratory provides scientific computing workflows, research facilities, and test environments. AMD supplies the underlying classical architecture, processing units, and open-source software libraries.

System Architecture and Technical Integration
The codesign architecture links the 120-qubit IBM Quantum Nighthawk system with the Umbra high-performance computing cluster in a colocated environment. Integrating these systems requires dividing workloads across specific processing domains:

AMD EPYC central processing units coordinate system orchestration and manage hybrid scheduling between classical and quantum nodes.

AMD Instinct graphics processing units process large-scale parallel simulations, workload optimizations, and matrix operations surrounding quantum tasks.

AMD Versal adaptive system-on-chips handle real-time control, signal readout, and low-latency syndrome decoding near the quantum processor.

The AMD ROCm open software environment enables developers to integrate high-performance computing tools and data pipelines across both hardware environments.

Infrastructure Deployment and Future Scalability
Initial deployment pairs the colocated IBM quantum hardware and the Umbra cluster directly to benchmark FPGA-based error decoding and GPU-accelerated scientific execution. Engineering teams evaluate latency thresholds, control loops, and communication protocols between the classical co-processors and quantum control hardware.

"Building useful quantum systems requires the quantum and classical computing communities to solve system design challenges together," said Ralph Wittig, Corporate Fellow, Head of Research & Advanced Development, AMD. "AMD brings expertise across CPUs, GPUs and FPGAs, from real-time control to leadership-class supercomputing... to develop and test how quantum processors, classical computing and software can work together at scale."

Subsequent phases include linking the codesign platform to the Oak Ridge Leadership Computing Facility. This integration will connect the environment with the Lux supercomputer, which utilizes AMD EPYC processors and Instinct accelerators, enabling evaluation of fault-tolerant quantum algorithms at full high-performance computing scale.

Edited by Evgeny Churilov, Induportals Media - Adapted by AI.

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