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CXL Memory Expansion Modules for AI Infrastructure

KIOXIA introduces a high-performance flash-based module designed to bridge the capacity and cost gap between standard DRAM and solid-state storage.

  europe.kioxia.com
CXL Memory Expansion Modules for AI Infrastructure

KIOXIA is releasing the XL1 series, a Compute Express Link (CXL) compatible memory expansion module targeting memory-intensive artificial intelligence applications. This solution integrates low-latency flash memory into hyperscale data center environments to address persistent capacity constraints and escalating hardware costs.

The XL1 series addresses the rising memory requirements of complex AI-driven workloads in modern data center facilities. The hardware was showcased at FMS: The Future of Memory and Storage, an industry event held from August 4 to 6, 2026, in Santa Clara, California. By utilizing a CXL interface, the module allows flash memory—typically reserved for persistent storage—to function as an active memory expansion solution. Evaluation samples are scheduled for shipment to industry ecosystem partners in August 2026.

Optimizing DRAM Utilization Through Tiered Architecture
The core technical mechanism of the XL1 series relies on combining the CXL interface with a proprietary low-latency flash architecture. In practice, the system improves overall DRAM utilization efficiency by migrating less frequently accessed data from primary standard DRAM to the expansion module. This tiered memory approach reduces the inherent performance and cost gap between traditional DRAM and standard Solid State Drives (SSDs). For high-performance computing (HPC) and cloud computing infrastructures, this architecture allows system operators to expand available memory capacity without incurring the proportional costs of populating standard server boards exclusively with high-density memory modules.

Architectural Implications for High-Performance Workloads
Axel Störmann, Vice President and Chief Technology Officer of KIOXIA Europe GmbH, indicated that as AI models expand, efficient memory management is critical to meeting the processing requirements of data-intensive applications. Störmann noted that combining low-latency flash with a CXL interface extends the memory hierarchy, optimizing standard memory utilization and enabling more efficient physical AI data infrastructure for complex computing workloads.

Additional Context
This section details technical specifications and competitive benchmarking not included in the original news release.

The enterprise memory expansion market utilizing the CXL protocol includes competing hardware such as Samsung's CXL Memory Expander and standard CXL-based DRAM modules from SK Hynix. While Samsung and SK Hynix primarily utilize DDR5 DRAM components to provide high-bandwidth expansion over the PCIe bus, the XL1 series utilizes a specialized low-latency NAND flash architecture. This flash-based approach typically yields higher latency metrics than standard CXL DRAM but offers a significantly lower cost-per-gigabyte, making it structurally comparable to discontinued persistent memory technologies like Intel Optane. By utilizing block-addressable flash over a memory-semantic CXL interface, organizations can scale memory capacities for massive AI datasets where density and cost optimization outweigh the need for strict nanosecond-level DRAM latencies.

Edited by Aishwarya Mambet, Induportals Editor, with AI assistance.

www.kioxia.com

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