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Ceva and Mobilint Advance Physical AI with REGULUS Edge AI SoC
First production deployment of Ceva’s NeuPro NPU family combines NeuPro-Nano with SensPro AI DSP to deliver advanced sensing and inference capabilities for Physical AI devices.
www.ceva-ip.com
Developing autonomous machines, robotics, and industrial vision endpoints—collectively grouped under Physical AI—requires continuous spatial awareness, real-time signal conditioning, and localized inference execution within tight physical and thermal constraints. Historically, edge engineering teams have faced difficult trade-offs between deploying monolithic, power-hungry host application processors or relying on external cloud connectivity to run complex neural networks. Offloading sensory inferences to centralized data centers introduces latency jitter, exposes sensitive operational telemetry to network interruptions, and consumes excessive RF transmission power. Conversely, running raw multi-modal sensor pipelines and deep neural models directly on conventional general-purpose microcontrollers quickly exhausts system thermal budgets and memory bandwidth. Mitigating these edge operational barriers requires heterogeneous multi-core System-on-Chip (SoC) architectures that segregate sensor pre-processing from continuous neural inference while operating within strict sub-three-watt envelopes.
Multi-Engine Architecture for Sub-3W Physical AI Endpoints
To address localized processing constraints in power- and space-limited installations, AI semiconductor developer Mobilint deployed Ceva’s intellectual property inside its REGULUS edge AI System-on-Chip. The silicon deployment marks the first full commercial production implementation of Ceva’s NeuPro NPU family.
The REGULUS SoC functions as a standalone processor for on-device machine intelligence, eliminating the requirement for an external host application processor. Fabricated to deliver 10 TOPS (Tera Operations Per Second) of AI compute performance while consuming under 3 watts of power, the processor supports up to 8 gigabytes of system memory. Its internal multi-engine architecture assigns discrete workloads to specialized processing blocks:
- Ceva SensPro AI DSP: Handles programmable digital signal processing, sensor fusion, acoustic conditioning, and pre-processing tasks for raw camera and sensor inputs.
- Ceva NeuPro-Nano NPN32 NPU: Executes low-latency, energy-efficient neural processing tailored for always-on edge inference and wake-up event monitoring.
- Mobilint Proprietary AI Acceleration: Works alongside the integrated DSP and NPU cores to process demanding neural network layers, balancing overall compute across the die.
Commercial Acceleration Hardware and Framework Ecosystem
The REGULUS SoC is already entering commercial hardware deployments, led by Mobilint’s MLD-R1 AI USB accelerator. First previewed at COMPUTEX 2026 and now commercially shipping, the plug-and-play USB peripheral enables existing industrial computers, legacy inspection fixtures, and field endpoints to incorporate real-time on-device machine learning without requiring baseboard architectural redesigns.
Targeting applications including automated mobile robots, industrial drones, machine vision inspection lines, smart security cameras, and embedded medical devices, the platform natively supports standard machine learning software ecosystems. The toolchain compiles models from PyTorch, ONNX, Hugging Face, TensorFlow, TensorFlow Lite, and Keras, allowing developers to deploy trained visual and generative models directly into production environments.
Additional Context
This section details technical specifications and competitive benchmarking not included in the original product announcement.
In industrial embedded vision and smart edge sensing, deploying AI accelerators under three watts demands careful management of memory bandwidth and thermal dissipation. Packaging a complete edge processor—including memory controllers, image signal processors (ISPs), and AI matrix engines—into a compact 17 by 17 millimeter ball grid array (BGA) package allows integration directly onto compact camera sensor boards and robotic joint assemblies. Hardware ISPs integrated into chips of this class typically support 4K video pipelines at 60 frames per second with dynamic range and temporal noise reduction, converting Bayer sensor data before passing frames to the vector DSP and NPU. By employing native 8-bit integer (INT8) quantization across matrix execution units, edge NPUs achieve high operations-per-watt efficiency, eliminating the thermal throttling and active fan-cooling overhead that historically limited vision deployments in sealed IP67 industrial housings.
Within the edge AI processor and accelerator landscape, Mobilint’s REGULUS SoC benchmarks directly against low-power edge vision solutions such as the Hailo-8 and Hailo-8L series, Ambarella’s CVflow family (such as CV72 and CV75), and the NXP Semiconductors i.MX 95 applications processor family. While competitors like Hailo frequently offer PCIe or M.2 co-processor modules that require a dedicated external x86 or ARM host processor to manage operating system stacks and peripheral driver scheduling, REGULUS integrates application processing, image signal pipelines, and neural execution onto a single standalone silicon die. Furthermore, whereas general-purpose edge application processors with integrated NPUs often partition AI acceleration through fixed-function blocks that lack granular DSP adaptability, coupling Ceva’s SensPro programmable DSP with the NeuPro-Nano core allows REGULUS to perform real-time acoustic signal conditioning, radar point-cloud filtering, and multi-sensor fusion simultaneously with deep-learning vision inference.
Edited by Romila DSilva, Induportals Editor, with AI assistance.
The REGULUS SoC is already entering commercial hardware deployments, led by Mobilint’s MLD-R1 AI USB accelerator. First previewed at COMPUTEX 2026 and now commercially shipping, the plug-and-play USB peripheral enables existing industrial computers, legacy inspection fixtures, and field endpoints to incorporate real-time on-device machine learning without requiring baseboard architectural redesigns.
Targeting applications including automated mobile robots, industrial drones, machine vision inspection lines, smart security cameras, and embedded medical devices, the platform natively supports standard machine learning software ecosystems. The toolchain compiles models from PyTorch, ONNX, Hugging Face, TensorFlow, TensorFlow Lite, and Keras, allowing developers to deploy trained visual and generative models directly into production environments.
Additional Context
This section details technical specifications and competitive benchmarking not included in the original product announcement.
In industrial embedded vision and smart edge sensing, deploying AI accelerators under three watts demands careful management of memory bandwidth and thermal dissipation. Packaging a complete edge processor—including memory controllers, image signal processors (ISPs), and AI matrix engines—into a compact 17 by 17 millimeter ball grid array (BGA) package allows integration directly onto compact camera sensor boards and robotic joint assemblies. Hardware ISPs integrated into chips of this class typically support 4K video pipelines at 60 frames per second with dynamic range and temporal noise reduction, converting Bayer sensor data before passing frames to the vector DSP and NPU. By employing native 8-bit integer (INT8) quantization across matrix execution units, edge NPUs achieve high operations-per-watt efficiency, eliminating the thermal throttling and active fan-cooling overhead that historically limited vision deployments in sealed IP67 industrial housings.
Within the edge AI processor and accelerator landscape, Mobilint’s REGULUS SoC benchmarks directly against low-power edge vision solutions such as the Hailo-8 and Hailo-8L series, Ambarella’s CVflow family (such as CV72 and CV75), and the NXP Semiconductors i.MX 95 applications processor family. While competitors like Hailo frequently offer PCIe or M.2 co-processor modules that require a dedicated external x86 or ARM host processor to manage operating system stacks and peripheral driver scheduling, REGULUS integrates application processing, image signal pipelines, and neural execution onto a single standalone silicon die. Furthermore, whereas general-purpose edge application processors with integrated NPUs often partition AI acceleration through fixed-function blocks that lack granular DSP adaptability, coupling Ceva’s SensPro programmable DSP with the NeuPro-Nano core allows REGULUS to perform real-time acoustic signal conditioning, radar point-cloud filtering, and multi-sensor fusion simultaneously with deep-learning vision inference.
Edited by Romila DSilva, Induportals Editor, with AI assistance.
