PCIe 7.0 Clock Generator for AI Infrastructure and Networking
Diodes Incorporated released the PI6CG33A06 clock generator to address jitter and power requirements in high-performance computing and data center platforms.
www.diodes.com
The introduction of the PI6CG33A06 six-output clock generator from Diodes Incorporated supports the PCIe 7.0 specification. This device was presented at the PCI-SIG Developers Conference to address the timing requirements of high-performance computing, AI infrastructure, and data center platforms. It is designed for compatibility with previous PCIe generations and provides the reference clocks necessary for 800G and 1.6T networking architectures.
High-speed data links operating at 128.0 GT/s require precise timing to maintain signal integrity across complex printed circuit boards. The PI6CG33A06 generates 25MHz and 100MHz reference clocks with a Root Mean Square jitter of less than 30 femtoseconds. This performance level is below the 67fs maximum permitted by the PCIe 7.0 specification and the 80fs defined by the Intel CK440Q standard. This reduced jitter provides hardware engineers with increased design margins to compensate for signal degradation across connectors and long trace lengths.
To address thermal management in high-density server racks, the device utilizes proprietary low-power, high-speed current-steering logic technology. This architectural approach reduces clock-related power consumption by approximately 50% compared to standard HCSL components. Additionally, the clock generator features integrated termination, which removes the requirement for up to 24 external resistors. This integration simplifies layout routing and reduces the total bill of materials, allowing more board space for cooling systems or additional memory components.
Control and system flexibility are managed through individual output enable pins for each of the six outputs. The device is housed in a 40-pin VQFN package measuring 5mm x 5mm and complies with the Intel CK440Q-Lite specification. This allows for the integration of the component into existing server architectures while providing the timing precision necessary for high-bandwidth accelerators.
Edited by an industrial journalist, Lekshman Ramdas, with AI assistance.
www.diodes.com
